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Role Overview – Junior Tester
As a Junior Tester, you will work in a semiconductor testing environment focused on:
- VLSI regression execution
- RTL/IP validation
- Simulation and debugging
- Automation using scripting and AI tools
You will also work with internal systems like Viper regression platform and industry-standard EDA tools such as Vivado, Questa, and VCS.
Key Responsibilities
- Manage regression execution cycles using internal tools (Perl, Make, XML/YML)
- Perform failure analysis and debugging using simulation logs
- Monitor testing infrastructure stability and ensure SLA compliance
- Support RTL, TCL-based IPs, and SV/UVM testbenches
- Execute simulations using tools like Vivado, Questa, VCS
- Use AI tools like Copilot and Codex to improve testing efficiency
- Handle ticket management and issue tracking workflows
Eligibility Criteria
- Qualification: B.E/B.Tech in Electronics, ECE, VLSI, or related fields
- Batch: 2025 / 2026
- Skills Required:
- Strong knowledge of Linux (mandatory)
- Proficiency in Python / Perl / Shell / TCL
- Understanding of VLSI, RTL design, or verification concepts
- Other Requirements:
- No active backlogs
- Good communication and teamwork skills
Selection Process
- Online Assessment
- Electronics fundamentals
- Linux basics
- Scripting & logical reasoning
- Technical Interview
- VLSI concepts
- RTL testing
- Linux & scripting
- EDA tools knowledge
- HR Interview
- Communication skills
- Career goals
- Cultural fit
Salary & Benefits
- Salary: Not disclosed (competitive for freshers)
- Health insurance and employee benefits
- Learning platform (HCLTech iLearn)
- Career growth in semiconductor domain
- Exposure to global clients and advanced EDA tools
